Data Fields

CPUINFO Struct Reference
[CPU APIs]

#include <SysInfo.h>

Data Fields

int number
 number of CPU's in the system
float speed1
 CPU 1 Mhz.
float speed2
 CPU 2 Mhz, 0.0 if no 2nd CPU.
int Family
int Model
int stepping
int MMX
 TRUE or FALSE.
int SIMD
 TRUE or FALSE. TRUE if SSE instructions are available.
unsigned int features
 All CPU features, Spare in V1.0, Features in V1.1.
int CPUIDSupport
 TRUE if CPU supports ID notification.
wchar_t manufacture [20]
 Name of Manufacture.
wchar_t typestring [50]
 80386, Pentium, etc, Increased from 30bytes to 50 in Bit3
wchar_t speedstring1 [CPU_SPEED_STRING_LENGTH]
 Speed string in ASCII 200 MHz, 300 etc for CPU1.
wchar_t speedstring2 [CPU_SPEED_STRING_LENGTH]
 Speed string in ASCII 200 MHz, 300 etc for CPU2.
int cacheinfo_num
 The number of cache elements. For Intel CPU's only.
int L2_cache_size
 Cache size. 128, 512, 1024, etc.., -1 = Unknown. For all CPU's.
int Brand
 only for PIII type 8 and above. 0=Not supported, 1 = Celeron, 2 = PIII, 3= PIII Xeon
int SerialAvail
 TRUE if serial number is available and not disabled. FALSE otherwise.
DWORD SerialNum1
 Part 1 of the 96 bit serial number.
DWORD SerialNum2
 Part 2 of the 96 bit serial number.
DWORD SerialNum3
 Part 3 of the 96 bit serial number.
int SMID_SSE2
 TRUE or FALSE. TRUE if SSE2 instructions are available.
int AMD3DNow
 TRUE or FALSE. TRUE if 3DNow instructions are available.
int iLogicalsPerCore
 The number of logical CPUs - may be larger than physical with hyperthreading.
int iHyperThreadStatus
 Whether Hyperthreading is enabled, supported, etc.
int L3_cache_size
 Cache size in KB. 128, 512, 1024, etc.., -1 = Unknown.
int SMID_SSE3
 TRUE or FALSE. TRUE if SSE3 instructions are available.
int iCoresPerPackage
 Number of cores per CPU package.
int MaxBasicInputValue
 The maximum CPUID basic information level supported.
int PAE
 Physical Address Extension is not supported, 1 PAE is supported.
int DEP
 DEP/XD is not supported, 1 DEP/XD is supported.
int SMID_SSE4_1
 SSE4.1 TRUE/FALSE.
int SMID_SSE4_2
 SSE4.2 TRUE/FALSE.
int EMT64
 EMT64 TRUE/FALSE.
int L1_instruction_cache_size
 L1 instruction cache size.
int Trace_cache_size
 Trace cache size.
int L1_data_cache_size
 L1 data cache size.
int Prefetching
 CPU prefetch size.
int L1_data_caches_per_package
 Num. L1 data caches per CPU package.
int L1_instruction_caches_per_package
 Num. L1 instruction caches per CPU package.
int L2_caches_per_package
 Num. L2 data caches per CPU package.
int L3_caches_per_package
 Num. L3 data caches per CPU package.
CPUMSRINFO MSR [MAX_NUM_CPUS]
int SMID_SSSE3
 TRUE or FALSE. TRUE if SSSE3 instructions are available.
int SMID_SSE4a
 TRUE or FALSE. TRUE if SSE4a instructions are available.
int VMX
 TRUE or FALSE. TRUE if processor supports Intel Virtulization Technology.
int SMX
 TRUE or FALSE. TRUE if processor supports Intel Trusted Execution Technology.
int ACPI
 Themal monitor supported (via MSRs).
wchar_t szEMT [VSHORT_STRING_LEN]
 The string to be used for EMT64.
int iManufacture
int HTT
 Hyperthreading capable.
CPU_SPECIFICATION Spec
 CPU specification.
CPU_SPECIFICATION_STEPPING CPUPackage [MAX_NUM_CPU_PACKAGES]
 CPU stepping for each CPU package.
bool bDTS
 Digital temperature sensor supported.
bool bIntelTurboBoost
 Intel Tubo boost supported.
int iMaxTurbo1Core
 Intel Tubo boost max multiplier when running 1 core.
int iMaxTurbo2Core
 Intel Tubo boost max multiplier when running 2 core.
int iMaxTurbo3Core
 Intel Tubo boost max multiplier when running 3 core.
int iMaxTurbo4Core
 Intel Tubo boost max multiplier when running 4 core.
float flCPUSpeedTurbo
 max speed when Turbo is engaged
int AES
 AES fucntions supported.
CPU_OCLK OCLKBaseClock
 The CPU has been overclocked, underclocked by changing the base CPU clock.
CPU_OCLK OCLKMultiplier
 The CPU has been overclocked by increasing the maximum multiplier.
CPU_OCLK OCLKFreq
 The CPU has been overclocked, method unknown.
bool bAMDTurboCore
 The CPU support AMD Turbo Core (CPB - Core Performacne Boost).
wchar_t szHyperThreadStatus [LONG_STRING_LEN]
 Whether Hyperthreading is enabled, supported, etc as a string.
wchar_t szCPUSummary [LONG_STRING_LEN]
 A summary of the CPUs on the system, as a string.
CPU_GROUPS_INFO CPUGroupsInfo
 Information about all of the CPU groups (used for setting CPU affinity for systems with more than 1 CPU group e.g. > 64 CPUs).
int Future_expansion8 [100]
 Reserved for future expansion.

Field Documentation

int number

number of CPU's in the system

float speed1

CPU 1 Mhz.

float speed2

CPU 2 Mhz, 0.0 if no 2nd CPU.

int Family
int Model
int stepping
int MMX

TRUE or FALSE.

int SIMD

TRUE or FALSE. TRUE if SSE instructions are available.

unsigned int features

All CPU features, Spare in V1.0, Features in V1.1.

TRUE if CPU supports ID notification.

wchar_t manufacture[20]

Name of Manufacture.

wchar_t typestring[50]

80386, Pentium, etc, Increased from 30bytes to 50 in Bit3

wchar_t speedstring1[CPU_SPEED_STRING_LENGTH]

Speed string in ASCII 200 MHz, 300 etc for CPU1.

wchar_t speedstring2[CPU_SPEED_STRING_LENGTH]

Speed string in ASCII 200 MHz, 300 etc for CPU2.

The number of cache elements. For Intel CPU's only.

Cache size. 128, 512, 1024, etc.., -1 = Unknown. For all CPU's.

int Brand

only for PIII type 8 and above. 0=Not supported, 1 = Celeron, 2 = PIII, 3= PIII Xeon

TRUE if serial number is available and not disabled. FALSE otherwise.

DWORD SerialNum1

Part 1 of the 96 bit serial number.

DWORD SerialNum2

Part 2 of the 96 bit serial number.

DWORD SerialNum3

Part 3 of the 96 bit serial number.

int SMID_SSE2

TRUE or FALSE. TRUE if SSE2 instructions are available.

int AMD3DNow

TRUE or FALSE. TRUE if 3DNow instructions are available.

The number of logical CPUs - may be larger than physical with hyperthreading.

Whether Hyperthreading is enabled, supported, etc.

Cache size in KB. 128, 512, 1024, etc.., -1 = Unknown.

int SMID_SSE3

TRUE or FALSE. TRUE if SSE3 instructions are available.

Number of cores per CPU package.

The maximum CPUID basic information level supported.

int PAE

Physical Address Extension is not supported, 1 PAE is supported.

int DEP

DEP/XD is not supported, 1 DEP/XD is supported.

SSE4.1 TRUE/FALSE.

SSE4.2 TRUE/FALSE.

int EMT64

EMT64 TRUE/FALSE.

L1 instruction cache size.

Trace cache size.

L1 data cache size.

CPU prefetch size.

Num. L1 data caches per CPU package.

Num. L1 instruction caches per CPU package.

Num. L2 data caches per CPU package.

Num. L3 data caches per CPU package.

CPUMSRINFO MSR[MAX_NUM_CPUS]

TRUE or FALSE. TRUE if SSSE3 instructions are available.

TRUE or FALSE. TRUE if SSE4a instructions are available.

int VMX

TRUE or FALSE. TRUE if processor supports Intel Virtulization Technology.

int SMX

TRUE or FALSE. TRUE if processor supports Intel Trusted Execution Technology.

int ACPI

Themal monitor supported (via MSRs).

wchar_t szEMT[VSHORT_STRING_LEN]

The string to be used for EMT64.

int HTT

Hyperthreading capable.

CPU specification.

CPU_SPECIFICATION_STEPPING CPUPackage[MAX_NUM_CPU_PACKAGES]

CPU stepping for each CPU package.

bool bDTS

Digital temperature sensor supported.

Intel Tubo boost supported.

Intel Tubo boost max multiplier when running 1 core.

Intel Tubo boost max multiplier when running 2 core.

Intel Tubo boost max multiplier when running 3 core.

Intel Tubo boost max multiplier when running 4 core.

max speed when Turbo is engaged

int AES

AES fucntions supported.

The CPU has been overclocked, underclocked by changing the base CPU clock.

The CPU has been overclocked by increasing the maximum multiplier.

The CPU has been overclocked, method unknown.

The CPU support AMD Turbo Core (CPB - Core Performacne Boost).

wchar_t szHyperThreadStatus[LONG_STRING_LEN]

Whether Hyperthreading is enabled, supported, etc as a string.

wchar_t szCPUSummary[LONG_STRING_LEN]

A summary of the CPUs on the system, as a string.

Information about all of the CPU groups (used for setting CPU affinity for systems with more than 1 CPU group e.g. > 64 CPUs).

Reserved for future expansion.


The documentation for this struct was generated from the following file:
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